You’ll be able to: Explain the semiconductor industry and the full ASIC & custom-IC flow; tell digital and analog design paths apart; read a chip spec.
Who Can Apply?
See how ICs are fabricated and where they're used.
Understand digital targets and when each is used.
Walk the end-to-end digital implementation flow.
See how gates and standard cells build blocks.
Grasp clocks, setup/hold and basic constraints.
Place simulation, STA and physical signoff in the flow.
Reason about PPA in digital design.
Understand analog design intent versus digital.
Use the transistor as the analog building block.
Recognise current mirrors, amplifiers and biasing.
Follow schematic → simulation → layout → verification.
See why physical layout drives analog performance.
Understand DRC/LVS/PEX in the custom flow.
